ELE 172 Digital Logic

Tentative Schedule

	Meeting time	Topic	Reading	Assignment
1	8-28	Introduction to digital logic, Number system and codes	1.1-1.5, 3.1-3.2
2	8-30	Lab 1: Digital logic gates	1.1-1.5, 3.1-3.2
3	9-4	Labor day, no class
4	9-6	Number system and codes, Switching algebra and combinational logic	2.1-2.6, 4.1	2.1-2.12
5	9-11	Number system and codes, Switching algebra and combinational logic	2.1-2.6, 4.1	Lab1 report due
6	9-13	Switching algebra and combinational logic	4.1-4.3
7	9-18	Combinational logic design practice	4.4, 6.1, 6.2	Quiz 1, (4.1-10,14,18)
8	9-20	Lab 2: Propagation delay		HW 1 due
9	9-25	Decoding, multiplexing and selecting	6.4,6.7
10	9-27	Combinational building blocks	6.5,6.6,6.8,6.9	Lab2 report due
11	10-2	Introduction to HDL	5.1, 5.3	Quiz 2
12	10-4	Introduction to HDL	5.1, 5.3
13	10-9	Fall break, no lecture
14	10-11	Introduction to HDL
15	10-16	Midterm exam
16	10-18	Lab 3: Introduction to programmable logic
17	10-23	Adders and Subtractors	6.10
18	10-25	Latches and Flip-Flops	7.1-7.2
19	10-30	State Machine Analysis	7.3-7.4
20	11-1	Lab 4: Binary Adders		Lab 3 report due
21	11-6	State Machine Design	7.5-7.7
22	11-8	Lab 5: Flip-flop		HW2 due
23	11-13	Sequential Circuit Design Practice	chapter 8	Quiz 3, Lab 4 report due
24	11-15	Lab 6: Counters
25	11-20	Sequential Circuit Design Practice	chapter 8	Lab 5 report due
26	11-22	Thanksgiving, no class
27	11-27	Design Practice: Project and Instructions
28	11-29	Lab 7 Design Practice		Lab 6 report due
29	12-4	Lab 7 Design Practice
30	12-6	Final Review and Design Practice Demo